coreboot

Coreboot (formerly known as LinuxBIOS2) is a free software project, endorsed by the Free Software Foundation,3 aimed at replacing the proprietary BIOS firmware found in most computers with a lightweight system designed to perform only the minimum of tasks necessary to load and run a modern 32-bit or 64-bit operating system.

Supported platforms

Besides x86 and x86-64 architectures, coreboot abutment additionally exists for the AMD Geode solutions. Abutment started with the Geode GX processor developed by AMD for the OLPC, Artec Group again added Geode LX abutment for its archetypal DBE61 ThinCan. Recently, that cipher was adopted by AMD and added able for the OLPC afterwards they upgraded to the Geode LX platform. That cipher is now actuality added developed by the coreboot association to abutment added AMD Geode solutions. Coreboot can be flashed assimilate an AMD Geode belvedere application Flashrom.

From that antecedent development on AMD Geode based platforms, coreboot abutment has been continued assimilate abounding AMD processors and chipsets. The processor account includes Family 0Fh and 10h (K8 core), and afresh Family 14h (Bobcat core, Fusion APU). Coreboot abutment additionally extends to AMD chipsets: RS690, RS7xx, SB600, and SB8xx. It is accepted that as fresh processors and chipsets are introduced, coreboot will bound abutment them as well

Design

Coreboot usually endless a Linux kernel, but it can amount any added stand-alone ELF executable, such as Etherboot, which can cossack Linux over a network, or SeaBIOS9, which can amount Linux, Microsoft Windows 2000 and later, and *BSD (previously, Windows 2000/XP and OpenBSD abutment was provided by ADLO1011). Coreboot can additionally amount about any operating arrangement from any accurate device, such as Myrinet, Quadrics, or SCI array interconnects. Some OSes (such as Windows 2000/XP/Vista/7 and *BSD) crave bequest BIOS functions which are provided by SeaBIOS.

A different affection of coreboot is that the x86 adaptation runs in 32-bit approach afterwards active alone ten instructions12 (almost all added x86 BIOSes run alone in 16-bit mode). This is agnate to the avant-garde UEFI firmware, which is acclimated on Intel-based Macintosh computers and added newer PC hardware.

Coreboot can cossack added kernels, or canyon ascendancy to a cossack loader to cossack a kernel/image instead. It can additionally cossack a Plan 9 from Bell Labs atom directlyclarification needed. A coreboot-capable adaptation of GNU GRUB 2 exists.

By default, coreboot does not accommodate BIOS alarm services. A burden alleged SeaBIOS can be acclimated to accommodate BIOS calls and appropriately acquiesce coreboot to amount operating systems that crave those services, about best avant-garde operating systems admission accouterments in addition address and alone use BIOS calls during aboriginal initialization and as a fallback mechanism

Initializing DRAM

The best difficult accouterments that coreboot initializes is the DRAM controllers and DRAM. In some cases, abstruse affidavit on this accountable is NDA belted or unavailable. RAM initialization is decidedly difficult because afore the RAM is initialized it cannot be used. Therefore, to initialize DRAM controllers and DRAM, the initialization cipher may accept alone the CPU's accepted purpose registers or Cache-as-RAM as acting storage.

romcc, a C compiler that uses registers instead of RAM, eases the task. Using romcc, it is almost accessible to accomplish SMBus accesses to the SPD ROMs of the DRAM DIMMs, that allows the RAM to be used.

With newer x86 processors, the processor accumulation can be acclimated as RAM until DRAM is initialized. The processor accumulation has to be initialized into Cache-as-RAM16 approach as well, but this needs beneath instructions than initializing DRAM. Also, the Cache-as-RAM approach initialization is specific to CPU architectures, appropriately added all-encompassing than DRAM initialization, which is specific to anniversary chipset and mainboard